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review.trustedfirmware.org / mirror / ARM-software / CMSIS_5 / eefdc5a6465ab7a1cd7d398f02df5a7446d2622f / . / ARM.CMSIS.pdsc
blob: 327544272129e608362e78adf8bb39b5e18a9f1d [file] [log] [blame]
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1<?xml version="1.0" encoding="UTF-8"?>
2
3<package schemaVersion="1.3" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="PACK.xsd">
4 <name>CMSIS</name>
5 <description>CMSIS (Cortex Microcontroller Software Interface Standard)</description>
6 <vendor>ARM</vendor>
7 <!-- <license>CMSIS/CMSIS_END_USER_LICENCE_AGREEMENT.rtf</license> -->
8 <url>http://www.keil.com/pack/</url>
9
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]10 <releases>
Martin Günther004ec722016-07-04 13:36:29 +0200[diff] [blame]11 <release version="5.0.0-Beta9">
12 CMSIS_Core:
13 - Replaced macro __SAU_PRESENT with __SAU_REGION_PRESENT.
14 - Reworked SAU register and functions.
15 </release>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]16 <release version="5.0.0-Beta8">
17 CMSIS-RTOS:
18 - API 2.0
19 - RTX 5.0.0-Alpha
20 </release>
Martin Günther4b3045d2016-06-30 11:27:07 +0200[diff] [blame]21 <release version="5.0.0-Beta7">
22 CMSIS_Core:
23 - Added macro __ALIGNED.
Martin Günther004ec722016-07-04 13:36:29 +0200[diff] [blame]24 - Updated function SCB_EnableICache.
Martin Günther4b3045d2016-06-30 11:27:07 +0200[diff] [blame]25 </release>
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]26 <release version="5.0.0-Beta6">
27 CMSIS_Core:
28 - Added SCB_CFSR register bit definitions in core_*.h.
29 - Added NVIC_GetEnableIRQ function in core_*.h.
30 - Updated core instruction macros in cmsis_gcc.h.
31 </release>
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]32 <release version="5.0.0-Beta5">
Martin Günther29502d72016-06-16 14:48:33 +0200[diff] [blame]33 CMSIS_DSP:
34 - Moved DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib.
35 - Added DSP libraries build projects to CMSIS pack.
Martin Günther10babd82016-06-14 14:10:36 +0200[diff] [blame]36 </release>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]37 <release version="5.0.0-Beta4">
38 Updated ARMv8MML device files.
39 - changes ARMv8MML_FP to ARMv8MML_SP, ARMv8MML_DP.
40 Updated CMSIS core files.
41 - changes according "CMSIS-Core v8M CMSIS 5.0 feedback".
42 </release>
43 <release version="5.0.0-Beta3">
44 Updated CMSIS ARMv8M core / device files
45 - increased SAU regions to 8.
46 - moved TZ_SAU_Setup() to partition_#device#.h.
47 </release>
48 <release version="5.0.0-Beta2">
49 - renamed core_*.h to lower case.
50 - renamed ARM_v8M?L.svd to ARMv8M?L.svd.
51 - updated ARMv8M?L.svd.
52 </release>
53 <release version="5.0.0-Beta1">
54 - added function SCB_GetFPUType() to all CMSIS cores.
55 - renamed cmsis_armcc_v6.h to cmsis_armclang.h.
56 - updated CMSIS core files to V5.0
57 - updated CMSIS Core change log.
58 - updated CMSIS DSP_Lib change log.
59 - updated CMSIS DSP_Lib libraries.
60 </release>
61 <release version="5.0.0-Beta" date="2015-12-15">
62 Added ARMv8M support to CMSIS-Core.
63 - CMSIS-Core 5.0.0 Beta (see revision history for details)
64 - CMSIS-RTOS
65 -- API 1.02 (unchanged)
66 -- RTX 4.81.0 (see revision history for details)
67 - CMSIS-SVD 1.3.2 (see revision history for details)
68 </release>
69 <release version="4.5.0" date="2015-10-28">
70 - CMSIS-Core 4.30.0 (see revision history for details)
71 - CMSIS-DAP 1.1.0 (unchanged)
72 - CMSIS-Driver 2.04.0 (see revision history for details)
73 - CMSIS-DSP 1.4.7 (no source code change [still labeled 1.4.5], see revision history for details)
74 - CMSIS-PACK 1.4.1 (see revision history for details)
75 - CMSIS-RTOS 4.80.0 Restored time delay parameter 'millisec' old behavior (prior V4.79) for software compatibility. (see revision history for details)
76 - CMSIS-SVD 1.3.1 (see revision history for details)
77 </release>
78 <release version="4.4.0" date="2015-09-11">
79 - CMSIS-Core 4.20 (see revision history for details)
80 - CMSIS-DSP 1.4.6 (no source code change [still labeled 1.4.5], see revision history for details)
81 - CMSIS-PACK 1.4.0 (adding memory attributes, algorithm style)
82 - CMSIS-Driver 2.03.0 (adding CAN [Controller Area Network] API)
83 - CMSIS-RTOS
84 -- API 1.02 (unchanged)
85 -- RTX 4.79 (see revision history for details)
86 - CMSIS-SVD 1.3.0 (see revision history for details)
87 - CMSIS-DAP 1.1.0 (extended with SWO support)
88 </release>
89 <release version="4.3.0" date="2015-03-20">
90 - CMSIS-Core 4.10 (Cortex-M7 extended Cache Maintenance functions)
91 - CMSIS-DSP 1.4.5 (see revision history for details)
92 - CMSIS-Driver 2.02 (adding SAI (Serial Audio Interface) API)
93 - CMSIS-PACK 1.3.3 (Semantic Versioning, Generator extensions)
94 - CMSIS-RTOS
95 -- API 1.02 (unchanged)
96 -- RTX 4.78 (see revision history for details)
97 - CMSIS-SVD 1.2 (unchanged)
98 </release>
99 <release version="4.2.0" date="2014-09-24">
100 Adding Cortex-M7 support
101 - CMSIS-Core 4.00 (Cortex-M7 support, corrected C++ include guards in core header files)
102 - CMSIS-DSP 1.4.4 (Cortex-M7 support and corrected out of bound issues)
103 - CMSIS-PACK 1.3.1 (Cortex-M7 updates, clarification, corrected batch files in Tutorial)
104 - CMSIS-SVD 1.2 (Cortex-M7 extensions)
105 - CMSIS-RTOS RTX 4.75 (see revision history for details)
106 </release>
107 <release version="4.1.1" date="2014-06-30">
108 - fixed conditions preventing the inclusion of the DSP library in projects for Infineon XMC4000 series devices
109 </release>
110 <release version="4.1.0" date="2014-06-12">
111 - CMSIS-Driver 2.02 (incompatible update)
112 - CMSIS-Pack 1.3 (see revision history for details)
113 - CMSIS-DSP 1.4.2 (unchanged)
114 - CMSIS-Core 3.30 (unchanged)
115 - CMSIS-RTOS RTX 4.74 (unchanged)
116 - CMSIS-RTOS API 1.02 (unchanged)
117 - CMSIS-SVD 1.10 (unchanged)
118 PACK:
119 - removed G++ specific files from PACK
120 - added Component Startup variant "C Startup"
121 - added Pack Checking Utility
122 - updated conditions to reflect tool-chain dependency
123 - added Taxonomy for Graphics
124 - updated Taxonomy for unified drivers from "Drivers" to "CMSIS Drivers"
125 </release>
126 <release version="4.0.0">
127 - CMSIS-Driver 2.00 Preliminary (incompatible update)
128 - CMSIS-Pack 1.1 Preliminary
129 - CMSIS-DSP 1.4.2 (see revision history for details)
130 - CMSIS-Core 3.30 (see revision history for details)
131 - CMSIS-RTOS RTX 4.74 (see revision history for details)
132 - CMSIS-RTOS API 1.02 (unchanged)
133 - CMSIS-SVD 1.10 (unchanged)
134 </release>
135 <release version="3.20.4">
136 - CMSIS-RTOS 4.74 (see revision history for details)
137 - PACK Extensions (Boards, Device Features, Flash Programming, Generators, Configuration Wizard). Schema version 1.1.
138 </release>
139 <release version="3.20.3">
140 - CMSIS-Driver API Version 1.10 ARM prefix added (incompatible change)
141 - CMSIS-RTOS 4.73 (see revision history for details)
142 </release>
143 <release version="3.20.2">
144 - CMSIS-Pack documentation has been added
145 - CMSIS-Drivers header and documentation have been added to PACK
146 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
147 </release>
148 <release version="3.20.1">
149 - CMSIS-RTOS Keil RTX V4.72 has been added to PACK
150 - CMSIS-CORE, CMSIS-DSP, CMSIS-RTOS API and CMSIS-SVD remain unchanged
151 </release>
152 <release version="3.20.0">
153 The software portions that are deployed in the application program are now under a BSD license which allows usage
154 of CMSIS components in any commercial or open source projects. The Pack Description file Arm.CMSIS.pdsc describes the use cases
155 The individual components have been update as listed below:
156 - CMSIS-CORE adds functions for setting breakpoints, supports the latest GCC Compiler, and contains several corrections.
157 - CMSIS-DSP library is optimized for more performance and contains several bug fixes.
158 - CMSIS-RTOS API is extended with capabilities for short timeouts, Kernel initialization, and prepared for a C++ interface.
159 - CMSIS-SVD is unchanged.
160 </release>
161 </releases>
162
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]163 <taxonomy>
164 <description Cclass="Board Support">Generic Interfaces for Evaluation and Development Boards</description>
165 <description Cclass="CMSIS" doc="CMSIS/Documentation/General/html/index.html">Cortex Microcontroller Software Interface Components</description>
166 <description Cclass="Device" doc="CMSIS/Documentation/Core/html/index.html">Startup, System Setup</description>
167 <description Cclass="CMSIS Driver" doc="CMSIS/Documentation/Driver/html/index.html">Unified Device Drivers compliant to CMSIS-Driver Specifications</description>
168 <description Cclass="File System">File Drive Support and File System</description>
169 <description Cclass="Graphics">Graphical User Interface</description>
170 <description Cclass="Network">Network Stack using Internet Protocols</description>
171 <description Cclass="USB">Universal Serial Bus Stack</description>
172 <description Cclass="Compiler">ARM Compiler Software Extensions</description>
173 </taxonomy>
174
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]175 <devices>
176 <!-- ****************************** Cortex-M0 ****************************** -->
177 <family Dfamily="ARM Cortex M0" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]178 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0497a/index.html" title="Cortex-M0 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]179 <description>
180The Cortex-M0 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
181- simple, easy-to-use programmers model
182- highly efficient ultra-low power operation
183- excellent code density
184- deterministic, high-performance interrupt handling
185- upward compatibility with the rest of the Cortex-M processor family.
186 </description>
187 <debug svd="Device/ARM/SVD/ARMCM0.svd"/>
188 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
189 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
190 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
191
192 <device Dname="ARMCM0">
193 <processor Dcore="Cortex-M0" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
194 <compile header="Device/ARM/ARMCM0/Include/ARMCM0.h" define="ARMCM0"/>
195 </device>
196 </family>
197
198 <!-- ****************************** Cortex-M0P ****************************** -->
199 <family Dfamily="ARM Cortex M0 plus" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]200 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0662b/index.html" title="Cortex-M0+ Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]201 <description>
202The Cortex-M0+ processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
203- simple, easy-to-use programmers model
204- highly efficient ultra-low power operation
205- excellent code density
206- deterministic, high-performance interrupt handling
207- upward compatibility with the rest of the Cortex-M processor family.
208 </description>
209 <debug svd="Device/ARM/SVD/ARMCM0P.svd"/>
210 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
211 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
212 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
213
214 <device Dname="ARMCM0P">
215 <processor Dcore="Cortex-M0+" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
216 <compile header="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h" define="ARMCM0P"/>
217 </device>
218 </family>
219
220 <!-- ****************************** Cortex-M3 ****************************** -->
221 <family Dfamily="ARM Cortex M3" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]222 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/index.html" title="Cortex-M3 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]223 <description>
224The Cortex-M3 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
225- simple, easy-to-use programmers model
226- highly efficient ultra-low power operation
227- excellent code density
228- deterministic, high-performance interrupt handling
229- upward compatibility with the rest of the Cortex-M processor family.
230 </description>
231 <debug svd="Device/ARM/SVD/ARMCM3.svd"/>
232 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
233 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
234 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
235
236 <device Dname="ARMCM3">
237 <processor Dcore="Cortex-M3" DcoreVersion="r2p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
238 <compile header="Device/ARM/ARMCM3/Include/ARMCM3.h" define="ARMCM3"/>
239 </device>
240 </family>
241
242 <!-- ****************************** Cortex-M4 ****************************** -->
243 <family Dfamily="ARM Cortex M4" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]244 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/index.html" title="Cortex-M4 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]245 <description>
246The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
247- simple, easy-to-use programmers model
248- highly efficient ultra-low power operation
249- excellent code density
250- deterministic, high-performance interrupt handling
251- upward compatibility with the rest of the Cortex-M processor family.
252 </description>
253 <debug svd="Device/ARM/SVD/ARMCM4.svd"/>
254 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
255 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
256 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
257
258 <device Dname="ARMCM4">
259 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
260 <compile header="Device/ARM/ARMCM4/Include/ARMCM4.h" define="ARMCM4"/>
261 </device>
262
263 <device Dname="ARMCM4_FP">
264 <processor Dcore="Cortex-M4" DcoreVersion="r0p1" Dfpu="1" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
265 <compile header="Device/ARM/ARMCM4/Include/ARMCM4_FP.h" define="ARMCM4_FP"/>
266 </device>
267 </family>
268
269 <!-- ****************************** Cortex-M7 ****************************** -->
270 <family Dfamily="ARM Cortex M7" Dvendor="ARM:82">
Martin Günther2d0f0e82016-05-17 09:06:12 +0200[diff] [blame]271 <book name="http://infocenter.arm.com/help/topic/com.arm.doc.dui0646b/index.html" title="Cortex-M7 Device Generic Users Guide"/>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]272 <description>
273The Cortex-M4 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of embedded applications. It offers significant benefits to developers, including:
274- simple, easy-to-use programmers model
275- highly efficient ultra-low power operation
276- excellent code density
277- deterministic, high-performance interrupt handling
278- upward compatibility with the rest of the Cortex-M processor family.
279 </description>
280 <debug svd="Device/ARM/SVD/ARMCM7.svd"/>
281 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
282 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
283 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
284
285 <device Dname="ARMCM7">
286 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="0" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
287 <compile header="Device/ARM/ARMCM7/Include/ARMCM7.h" define="ARMCM7"/>
288 </device>
289
290 <device Dname="ARMCM7_SP">
291 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
292 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_SP.h" define="ARMCM7_SP"/>
293 </device>
294
295 <device Dname="ARMCM7_DP">
296 <processor Dcore="Cortex-M7" DcoreVersion="r0p0" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
297 <compile header="Device/ARM/ARMCM7/Include/ARMCM7_DP.h" define="ARMCM7_DP"/>
298 </device>
299 </family>
300
301 <!-- ****************************** ARMSC000 ****************************** -->
302 <family Dfamily="ARM SC000" Dvendor="ARM:82">
303 <description>
304The ARM SC000 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
305- simple, easy-to-use programmers model
306- highly efficient ultra-low power operation
307- excellent code density
308- deterministic, high-performance interrupt handling
309 </description>
310 <debug svd="Device/ARM/SVD/ARMSC000.svd"/>
311 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
312 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
313 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
314
315 <device Dname="ARMSC000">
316 <processor Dcore="SC000" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
317 <compile header="Device/ARM/ARMSC000/Include/ARMSC000.h" define="ARMSC000"/>
318 </device>
319 </family>
320
321 <!-- ****************************** ARMSC300 ****************************** -->
322 <family Dfamily="ARM SC300" Dvendor="ARM:82">
323 <description>
324The ARM SC300 processor is an entry-level 32-bit ARM Cortex processor designed for a broad range of secure embedded applications. It offers significant benefits to developers, including:
325- simple, easy-to-use programmers model
326- highly efficient ultra-low power operation
327- excellent code density
328- deterministic, high-performance interrupt handling
329 </description>
330 <debug svd="Device/ARM/SVD/ARMSC300.svd"/>
331 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
332 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
333 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
334
335 <device Dname="ARMSC300">
336 <processor Dcore="SC300" DcoreVersion="r0p1" Dfpu="0" Dmpu="0" Dendian="Configurable" Dclock="10000000"/>
337 <compile header="Device/ARM/ARMSC300/Include/ARMSC300.h" define="ARMSC300"/>
338 </device>
339 </family>
340
341 <!-- ****************************** ARMv8-M Baseline ********************** -->
342 <family Dfamily="ARMv8-M Baseline" Dvendor="ARM:82">
343 <!--book name="Device/ARM/Documents/ARMv8MBL_dgug.pdf" title="ARMv8MBL Device Generic Users Guide"/-->
344 <description>
345The ARMv8MBL processor is brand new.
346 </description>
347 <debug svd="Device/ARM/SVD/ARMv8MBL.svd"/>
348 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
349 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
350 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
351
352 <device Dname="ARMv8MBL">
353 <processor Dcore="ARMV8MBL" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
354 <compile header="Device/ARM/ARMv8MBL/Include/ARMv8MBL.h" define="ARMv8MBL"/>
355 </device>
356 </family>
357
358 <!-- ****************************** ARMv8-M Mainline ****************************** -->
359 <family Dfamily="ARMv8-M Mainline" Dvendor="ARM:82">
360 <!--book name="Device/ARM/Documents/ARMv8MML_dgug.pdf" title="ARMv8MML Device Generic Users Guide"/-->
361 <description>
362The ARMv8MML processor is brand new.
363 </description>
364 <debug svd="Device/ARM/SVD/ARMv8MML.svd"/>
365 <memory id="IROM1" start="0x00000000" size="0x00040000" startup="1" default="1"/>
366 <memory id="IRAM1" start="0x20000000" size="0x00020000" init ="0" default="1"/>
367 <!--algorithm name="Device/ARM/Flash/NEW_DEVICE.FLM" start="0x00000000" size="0x00040000" default="1"/-->
368
369 <device Dname="ARMv8MML">
370 <processor Dcore="ARMV8MML" DcoreVersion="r0p0" Dfpu="0" Dmpu="0" Dendian="Little-endian" Dclock="10000000"/>
371 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML.h" define="ARMv8MML"/>
372 </device>
373
374 <device Dname="ARMv8MML_SP">
375 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="SP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
376 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_SP.h" define="ARMv8MML_SP"/>
377 </device>
378
379 <device Dname="ARMv8MML_DP">
380 <processor Dcore="ARMV8MML" DcoreVersion="r0p1" Dfpu="DP_FPU" Dmpu="1" Dendian="Configurable" Dclock="10000000"/>
381 <compile header="Device/ARM/ARMv8MML/Include/ARMv8MML_DP.h" define="ARMv8MML_DP"/>
382 </device>
383 </family>
384
385 </devices>
386
387
388 <apis>
389 <!-- CMSIS-RTOS API -->
390 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="1.0" exclusive="1">
391 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
392 <files>
393 <file category="doc" name="CMSIS/Documentation/RTOS/html/index.html"/>
394 </files>
395 </api>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]396 <api Cclass="CMSIS" Cgroup="RTOS" Capiversion="2.0" exclusive="1">
397 <description>CMSIS-RTOS API for Cortex-M, SC000, and SC300</description>
398 <files>
399 <file category="doc" name="CMSIS/Documentation/RTOS2/html/index.html"/>
400 </files>
401 </api>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]402 <api Cclass="CMSIS Driver" Cgroup="USART" Capiversion="2.02" exclusive="0">
403 <description>USART Driver API for Cortex-M</description>
404 <files>
405 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usart__interface__gr.html" />
406 <file category="header" name="CMSIS/Driver/Include/Driver_USART.h" />
407 </files>
408 </api>
409 <api Cclass="CMSIS Driver" Cgroup="SPI" Capiversion="2.01" exclusive="0">
410 <description>SPI Driver API for Cortex-M</description>
411 <files>
412 <file category="doc" name="CMSIS/Documentation/Driver/html/group__spi__interface__gr.html" />
413 <file category="header" name="CMSIS/Driver/Include/Driver_SPI.h" />
414 </files>
415 </api>
416 <api Cclass="CMSIS Driver" Cgroup="SAI" Capiversion="1.00" exclusive="0">
417 <description>SAI Driver API for Cortex-M</description>
418 <files>
419 <file category="doc" name="CMSIS/Documentation/Driver/html/group__sai__interface__gr.html"/>
420 <file category="header" name="CMSIS/Driver/Include/Driver_SAI.h" />
421 </files>
422 </api>
423 <api Cclass="CMSIS Driver" Cgroup="I2C" Capiversion="2.02" exclusive="0">
424 <description>I2C Driver API for Cortex-M</description>
425 <files>
426 <file category="doc" name="CMSIS/Documentation/Driver/html/group__i2c__interface__gr.html"/>
427 <file category="header" name="CMSIS/Driver/Include/Driver_I2C.h" />
428 </files>
429 </api>
430 <api Cclass="CMSIS Driver" Cgroup="CAN" Capiversion="1.00" exclusive="0">
431 <description>CAN Driver API for Cortex-M</description>
432 <files>
433 <file category="doc" name="CMSIS/Documentation/Driver/html/group__can__interface__gr.html"/>
434 <file category="header" name="CMSIS/Driver/Include/Driver_CAN.h" />
435 </files>
436 </api>
437 <api Cclass="CMSIS Driver" Cgroup="Flash" Capiversion="2.00" exclusive="0">
438 <description>Flash Driver API for Cortex-M</description>
439 <files>
440 <file category="doc" name="CMSIS/Documentation/Driver/html/group__flash__interface__gr.html" />
441 <file category="header" name="CMSIS/Driver/Include/Driver_Flash.h" />
442 </files>
443 </api>
444 <api Cclass="CMSIS Driver" Cgroup="MCI" Capiversion="2.02" exclusive="0">
445 <description>MCI Driver API for Cortex-M</description>
446 <files>
447 <file category="doc" name="CMSIS/Documentation/Driver/html/group__mci__interface__gr.html" />
448 <file category="header" name="CMSIS/Driver/Include/Driver_MCI.h" />
449 </files>
450 </api>
451 <api Cclass="CMSIS Driver" Cgroup="NAND" Capiversion="2.01" exclusive="0">
452 <description>NAND Flash Driver API for Cortex-M</description>
453 <files>
454 <file category="doc" name="CMSIS/Documentation/Driver/html/group__nand__interface__gr.html" />
455 <file category="header" name="CMSIS/Driver/Include/Driver_NAND.h" />
456 </files>
457 </api>
458 <api Cclass="CMSIS Driver" Cgroup="Ethernet" Capiversion="2.01" exclusive="0">
459 <description>Ethernet MAC and PHY Driver API for Cortex-M</description>
460 <files>
461 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__interface__gr.html" />
462 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
463 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
464 </files>
465 </api>
466 <api Cclass="CMSIS Driver" Cgroup="Ethernet MAC" Capiversion="2.01" exclusive="0">
467 <description>Ethernet MAC Driver API for Cortex-M</description>
468 <files>
469 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__mac__interface__gr.html" />
470 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_MAC.h" />
471 </files>
472 </api>
473 <api Cclass="CMSIS Driver" Cgroup="Ethernet PHY" Capiversion="2.00" exclusive="0">
474 <description>Ethernet PHY Driver API for Cortex-M</description>
475 <files>
476 <file category="doc" name="CMSIS/Documentation/Driver/html/group__eth__phy__interface__gr.html" />
477 <file category="header" name="CMSIS/Driver/Include/Driver_ETH_PHY.h" />
478 </files>
479 </api>
480 <api Cclass="CMSIS Driver" Cgroup="USB Device" Capiversion="2.01" exclusive="0">
481 <description>USB Device Driver API for Cortex-M</description>
482 <files>
483 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbd__interface__gr.html" />
484 <file category="header" name="CMSIS/Driver/Include/Driver_USBD.h" />
485 </files>
486 </api>
487 <api Cclass="CMSIS Driver" Cgroup="USB Host" Capiversion="2.01" exclusive="0">
488 <description>USB Host Driver API for Cortex-M</description>
489 <files>
490 <file category="doc" name="CMSIS/Documentation/Driver/html/group__usbh__interface__gr.html" />
491 <file category="header" name="CMSIS/Driver/Include/Driver_USBH.h" />
492 </files>
493 </api>
494 </apis>
495
496 <!-- conditions are dependency rules that can apply to a component or an individual file -->
497 <conditions>
498 <condition id="ARMCC">
499 <require Tcompiler="ARMCC"/>
500 </condition>
501
502 <condition id="GCC">
503 <require Tcompiler="GCC"/>
504 </condition>
505
506 <condition id="IAR">
507 <require Tcompiler="IAR"/>
508 </condition>
509
510 <condition id="ARMCC GCC">
511 <accept Tcompiler="ARMCC"/>
512 <accept Tcompiler="GCC"/>
513 </condition>
514
515 <condition id="Cortex-M Device">
516 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000</description>
517 <accept Dcore="Cortex-M0"/>
518 <accept Dcore="Cortex-M0+"/>
519 <accept Dcore="Cortex-M3"/>
520 <accept Dcore="Cortex-M4"/>
521 <accept Dcore="Cortex-M7"/>
522 <accept Dcore="SC000"/>
523 <accept Dcore="SC300"/>
524 </condition>
525
526 <condition id="Cortex-M ARMv8-M Device">
527 <description>Cortex-M processor based device: one of CM0, CM0+, CM3, CM4, CM7, SC000, SC3000, ARMv8MBL, ARMv8MML</description>
528 <accept Dcore="Cortex-M0"/>
529 <accept Dcore="Cortex-M0+"/>
530 <accept Dcore="Cortex-M3"/>
531 <accept Dcore="Cortex-M4"/>
532 <accept Dcore="Cortex-M7"/>
533 <accept Dcore="SC000"/>
534 <accept Dcore="SC300"/>
535 <accept Dcore="ARMV8MBL"/>
536 <accept Dcore="ARMV8MML"/>
537 </condition>
538
539 <condition id="Cortex-M Device CMSIS Core">
540 <description>ARM Cortex-M device that depends on CMSIS Core component</description>
541 <require condition="Cortex-M Device"/>
542 <require Cclass="CMSIS" Cgroup="CORE"/>
543 </condition>
544
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]545 <condition id="CMSIS Core">
546 <description>CMSIS CORE processor and device specific Startup files</description>
547 <require Cclass="CMSIS" Cgroup="CORE"/>
548 </condition>
549
550 <condition id="ARMCM0 CMSIS">
551 <!-- conditions selecting Devices -->
552 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core</description>
553 <require Dvendor="ARM:82" Dname="ARMCM0"/>
554 <require Cclass="CMSIS" Cgroup="CORE"/>
555 </condition>
556
557 <condition id="ARMCM0 CMSIS GCC">
558 <!-- conditions selecting Devices -->
559 <description>Generic ARM Cortex-M0 device startup and depends on CMSIS Core requiring GCC</description>
560 <require condition="ARMCM0 CMSIS"/>
561 <require condition="GCC"/>
562 </condition>
563
564 <condition id="ARMCM0+ CMSIS">
565 <description>Generic ARM Cortex-M0+ device startup and depends on CMSIS Core</description>
566 <require Dvendor="ARM:82" Dname="ARMCM0P"/>
567 <require Cclass="CMSIS" Cgroup="CORE"/>
568 </condition>
569
570 <condition id="ARMCM0+ CMSIS GCC">
571 <description>Generic ARM Cortex-M0+ device startup and depends CMSIS Core requiring GCC</description>
572 <require condition="ARMCM0+ CMSIS"/>
573 <require condition="GCC"/>
574 </condition>
575
576 <condition id="ARMCM3 CMSIS">
577 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core</description>
578 <require Dvendor="ARM:82" Dname="ARMCM3"/>
579 <require Cclass="CMSIS" Cgroup="CORE"/>
580 </condition>
581
582 <condition id="ARMCM3 CMSIS GCC">
583 <description>Generic ARM Cortex-M3 device startup and depends on CMSIS Core requiring GCC</description>
584 <require condition="ARMCM3 CMSIS"/>
585 <require condition="GCC"/>
586 </condition>
587
588 <condition id="ARMCM4 CMSIS">
589 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core</description>
590 <require Dvendor="ARM:82" Dname="ARMCM4*"/>
591 <require Cclass="CMSIS" Cgroup="CORE"/>
592 </condition>
593
594 <condition id="ARMCM4 CMSIS GCC">
595 <description>Generic ARM Cortex-M4 device startup and depends on CMSIS Core requiring GCC</description>
596 <require condition="ARMCM4 CMSIS"/>
597 <require condition="GCC"/>
598 </condition>
599
600 <condition id="ARMCM7 CMSIS">
601 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core</description>
602 <require Dvendor="ARM:82" Dname="ARMCM7*"/>
603 <require Cclass="CMSIS" Cgroup="CORE"/>
604 </condition>
605
606 <condition id="ARMCM7 CMSIS GCC">
607 <description>Generic ARM Cortex-M7 device startup and depends on CMSIS Core requiring GCC</description>
608 <require condition="ARMCM7 CMSIS"/>
609 <require condition="GCC"/>
610 </condition>
611
612 <condition id="ARMSC000 CMSIS">
613 <description>Generic ARM SC000 device startup and depends on CMSIS Core</description>
614 <require Dvendor="ARM:82" Dname="ARMSC000"/>
615 <require Cclass="CMSIS" Cgroup="CORE"/>
616 </condition>
617
618 <condition id="ARMSC000 CMSIS GCC">
619 <description>Generic ARM SC000 device startup and depends on CMSIS Core requiring GCC</description>
620 <require condition="ARMSC000 CMSIS"/>
621 <require condition="GCC"/>
622 </condition>
623
624 <condition id="ARMSC300 CMSIS">
625 <description>Generic ARM SC300 device startup and depends on CMSIS Core</description>
626 <require Dvendor="ARM:82" Dname="ARMSC300"/>
627 <require Cclass="CMSIS" Cgroup="CORE"/>
628 </condition>
629
630 <condition id="ARMSC300 CMSIS GCC">
631 <description>Generic ARM SC300 device startup and dependson CMSIS Core requiring GCC</description>
632 <require condition="ARMSC300 CMSIS"/>
633 <require condition="GCC"/>
634 </condition>
635
636 <condition id="ARMv8MBL CMSIS">
637 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core</description>
638 <require Dvendor="ARM:82" Dname="ARMv8MBL"/>
639 <require Cclass="CMSIS" Cgroup="CORE"/>
640 </condition>
641
642 <condition id="ARMv8MBL CMSIS GCC">
643 <description>Generic ARM ARMv8MBL device startup and depends on CMSIS Core requiring GCC</description>
644 <require condition="ARMv8MBL CMSIS"/>
645 <require condition="GCC"/>
646 </condition>
647
648 <condition id="ARMv8MML CMSIS">
649 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core</description>
650 <require Dvendor="ARM:82" Dname="ARMv8MML*"/>
651 <require Cclass="CMSIS" Cgroup="CORE"/>
652 </condition>
653
654 <condition id="ARMv8MML CMSIS GCC">
655 <description>Generic ARM ARMv8MML device startup and depends on CMSIS Core requiring GCC</description>
656 <require condition="ARMv8MML CMSIS"/>
657 <require condition="GCC"/>
658 </condition>
659
660 <condition id="CMSIS DSP">
661 <description>CMSIS DSP Library is for ARM Cortex-M Devices only and is prebuild for one of the compilers ARMCC, GCC or IAR</description>
662 <require condition="Cortex-M Device CMSIS Core"/>
663 <accept Tcompiler="GCC"/>
664 <accept Tcompiler="ARMCC"/>
665 <accept Tcompiler="IAR"/>
666 </condition>
667
668 <!-- ARMCC compiler -->
669 <condition id="CM0_LE_ARMCC">
670 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the ARM Compiler</description>
671 <accept Dcore="Cortex-M0"/>
672 <accept Dcore="Cortex-M0+"/>
673 <accept Dcore="SC000"/>
674 <require Dendian="Little-endian"/>
675 <require Tcompiler="ARMCC"/>
676 </condition>
677
678 <condition id="CM0_BE_ARMCC">
679 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the ARM Compiler</description>
680 <accept Dcore="Cortex-M0"/>
681 <accept Dcore="Cortex-M0+"/>
682 <accept Dcore="SC000"/>
683 <require Dendian="Big-endian"/>
684 <require Tcompiler="ARMCC"/>
685 </condition>
686
687 <condition id="CM3_LE_ARMCC">
688 <description>Cortex-M3 or SC300 processor based device in little endian mode for the ARM Compiler</description>
689 <accept Dcore="Cortex-M3"/>
690 <accept Dcore="SC300"/>
691 <require Dendian="Little-endian"/>
692 <require Tcompiler="ARMCC"/>
693 </condition>
694
695 <condition id="CM3_BE_ARMCC">
696 <description>Cortex-M3 or SC300 processor based device in big endian mode for the ARM Compiler</description>
697 <accept Dcore="Cortex-M3"/>
698 <accept Dcore="SC300"/>
699 <require Dendian="Big-endian"/>
700 <require Tcompiler="ARMCC"/>
701 </condition>
702
703 <condition id="CM4_LE_ARMCC">
704 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler</description>
705 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
706 <require Tcompiler="ARMCC"/>
707 </condition>
708
709 <condition id="CM4_BE_ARMCC">
710 <description>Cortex-M4 processor based device in big endian mode for the ARM Compiler</description>
711 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
712 <require Tcompiler="ARMCC"/>
713 </condition>
714
715 <condition id="CM4F_LE_ARMCC">
716 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
717 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
718 <require Tcompiler="ARMCC"/>
719 </condition>
720
721 <condition id="CM4F_BE_ARMCC">
722 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
723 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
724 <require Tcompiler="ARMCC"/>
725 </condition>
726
727 <!-- XMC 4000 Series devices from Infineon require a special library -->
728 <condition id="CM4_LE_ARMCC_STD">
729 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler without Infineon devices</description>
730 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
731 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
732 <require Tcompiler="ARMCC"/>
733 </condition>
734 <condition id="CM4_LE_ARMCC_IFX">
735 <description>Cortex-M4 processor based device in little endian mode for the ARM Compiler and Infineon devices</description>
736 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
737 <require Tcompiler="ARMCC"/>
738 </condition>
739 <condition id="CM4F_LE_ARMCC_STD">
740 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler without Infineon devices</description>
741 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
742 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
743 <require Tcompiler="ARMCC"/>
744 </condition>
745 <condition id="CM4F_LE_ARMCC_IFX">
746 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the ARM Compiler and Infineon devices</description>
747 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
748 <require Tcompiler="ARMCC"/>
749 </condition>
750
751 <condition id="CM7_LE_ARMCC">
752 <description>Cortex-M7 processor based device in little endian mode for the ARM Compiler</description>
753 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
754 <require Tcompiler="ARMCC"/>
755 </condition>
756
757 <condition id="CM7_BE_ARMCC">
758 <description>Cortex-M7 processor based device in big endian mode for the ARM Compiler</description>
759 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
760 <require Tcompiler="ARMCC"/>
761 </condition>
762
763 <condition id="CM7F_LE_ARMCC">
764 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
765 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
766 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
767 <require Tcompiler="ARMCC"/>
768 </condition>
769
770 <condition id="CM7F_BE_ARMCC">
771 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
772 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
773 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
774 <require Tcompiler="ARMCC"/>
775 </condition>
776
777 <condition id="CM7FSP_LE_ARMCC">
778 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
779 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
780 <require Tcompiler="ARMCC"/>
781 </condition>
782
783 <condition id="CM7FSP_BE_ARMCC">
784 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
785 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
786 <require Tcompiler="ARMCC"/>
787 </condition>
788
789 <condition id="CM7FDP_LE_ARMCC">
790 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the ARM Compiler</description>
791 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
792 <require Tcompiler="ARMCC"/>
793 </condition>
794
795 <condition id="CM7FDP_BE_ARMCC">
796 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the ARM Compiler</description>
797 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
798 <require Tcompiler="ARMCC"/>
799 </condition>
800
801 <!-- GCC compiler -->
802 <condition id="CM0_LE_GCC">
803 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the GCC Compiler</description>
804 <accept Dcore="Cortex-M0"/>
805 <accept Dcore="Cortex-M0+"/>
806 <accept Dcore="SC000"/>
807 <require Dendian="Little-endian"/>
808 <require Tcompiler="GCC"/>
809 </condition>
810
811 <condition id="CM0_BE_GCC">
812 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the GCC Compiler</description>
813 <accept Dcore="Cortex-M0"/>
814 <accept Dcore="Cortex-M0+"/>
815 <accept Dcore="SC000"/>
816 <require Dendian="Big-endian"/>
817 <require Tcompiler="GCC"/>
818 </condition>
819
820 <condition id="CM3_LE_GCC">
821 <description>Cortex-M3 or SC300 processor based device in little endian mode for the GCC Compiler</description>
822 <accept Dcore="Cortex-M3"/>
823 <accept Dcore="SC300"/>
824 <require Dendian="Little-endian"/>
825 <require Tcompiler="GCC"/>
826 </condition>
827
828 <condition id="CM3_BE_GCC">
829 <description>Cortex-M3 or SC300 processor based device in big endian mode for the GCC Compiler</description>
830 <accept Dcore="Cortex-M3"/>
831 <accept Dcore="SC300"/>
832 <require Dendian="Big-endian"/>
833 <require Tcompiler="GCC"/>
834 </condition>
835
836 <condition id="CM4_LE_GCC">
837 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler</description>
838 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
839 <require Tcompiler="GCC"/>
840 </condition>
841
842 <condition id="CM4_BE_GCC">
843 <description>Cortex-M4 processor based device in big endian mode for the GCC Compiler</description>
844 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
845 <require Tcompiler="GCC"/>
846 </condition>
847
848 <condition id="CM4F_LE_GCC">
849 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
850 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
851 <require Tcompiler="GCC"/>
852 </condition>
853
854 <condition id="CM4F_BE_GCC">
855 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
856 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
857 <require Tcompiler="GCC"/>
858 </condition>
859
860 <!-- XMC 4000 Series devices from Infineon require a special library -->
861 <condition id="CM4_LE_GCC_STD">
862 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler without Infineon devices</description>
863 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
864 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
865 <require Tcompiler="GCC"/>
866 </condition>
867 <condition id="CM4_LE_GCC_IFX">
868 <description>Cortex-M4 processor based device in little endian mode for the GCC Compiler and Infineon devices</description>
869 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
870 <require Tcompiler="GCC"/>
871 </condition>
872 <condition id="CM4F_LE_GCC_STD">
873 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler without Infineon devices</description>
874 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
875 <deny Dvendor="Infineon:7" Dname="XMC4*"/>
876 <require Tcompiler="GCC"/>
877 </condition>
878 <condition id="CM4F_LE_GCC_IFX">
879 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the GCC Compiler and Infineon devices</description>
880 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian" Dvendor="Infineon:7" Dname="XMC4*"/>
881 <require Tcompiler="GCC"/>
882 </condition>
883
884 <condition id="CM7_LE_GCC">
885 <description>Cortex-M7 processor based device in little endian mode for the GCC Compiler</description>
886 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
887 <require Tcompiler="GCC"/>
888 </condition>
889
890 <condition id="CM7_BE_GCC">
891 <description>Cortex-M7 processor based device in big endian mode for the GCC Compiler</description>
892 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
893 <require Tcompiler="GCC"/>
894 </condition>
895
896 <condition id="CM7F_LE_GCC">
897 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
898 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
899 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
900 <require Tcompiler="GCC"/>
901 </condition>
902
903 <condition id="CM7F_BE_GCC">
904 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
905 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
906 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
907 <require Tcompiler="GCC"/>
908 </condition>
909
910 <condition id="CM7FSP_LE_GCC">
911 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
912 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
913 <require Tcompiler="GCC"/>
914 </condition>
915
916 <condition id="CM7FSP_BE_GCC">
917 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
918 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
919 <require Tcompiler="GCC"/>
920 </condition>
921
922 <condition id="CM7FDP_LE_GCC">
923 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the GCC Compiler</description>
924 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
925 <require Tcompiler="GCC"/>
926 </condition>
927
928 <condition id="CM7FDP_BE_GCC">
929 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the GCC Compiler</description>
930 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
931 <require Tcompiler="GCC"/>
932 </condition>
933
934 <!-- IAR compiler -->
935 <condition id="CM0_LE_IAR">
936 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in little endian mode for the IAR Compiler</description>
937 <accept Dcore="Cortex-M0"/>
938 <accept Dcore="Cortex-M0+"/>
939 <accept Dcore="SC000"/>
940 <require Dendian="Little-endian"/>
941 <require Tcompiler="IAR"/>
942 </condition>
943
944 <condition id="CM0_BE_IAR">
945 <description>Cortex-M0 or Cortex-M0+ or SC000 processor based device in big endian mode for the IAR Compiler</description>
946 <accept Dcore="Cortex-M0"/>
947 <accept Dcore="Cortex-M0+"/>
948 <accept Dcore="SC000"/>
949 <require Dendian="Big-endian"/>
950 <require Tcompiler="IAR"/>
951 </condition>
952
953 <condition id="CM3_LE_IAR">
954 <description>Cortex-M3 or SC300 processor based device in little endian mode for the IAR Compiler</description>
955 <accept Dcore="Cortex-M3"/>
956 <accept Dcore="SC300"/>
957 <require Dendian="Little-endian"/>
958 <require Tcompiler="IAR"/>
959 </condition>
960
961 <condition id="CM3_BE_IAR">
962 <description>Cortex-M3 or SC300 processor based device in big endian mode for the IAR Compiler</description>
963 <accept Dcore="Cortex-M3"/>
964 <accept Dcore="SC300"/>
965 <require Dendian="Big-endian"/>
966 <require Tcompiler="IAR"/>
967 </condition>
968
969 <condition id="CM4_LE_IAR">
970 <description>Cortex-M4 processor based device in little endian mode for the IAR Compiler</description>
971 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Little-endian"/>
972 <require Tcompiler="IAR"/>
973 </condition>
974
975 <condition id="CM4_BE_IAR">
976 <description>Cortex-M4 processor based device in big endian mode for the IAR Compiler</description>
977 <require Dcore="Cortex-M4" Dfpu="NO_FPU" Dendian="Big-endian"/>
978 <require Tcompiler="IAR"/>
979 </condition>
980
981 <condition id="CM4F_LE_IAR">
982 <description>Cortex-M4 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
983 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Little-endian"/>
984 <require Tcompiler="IAR"/>
985 </condition>
986
987 <condition id="CM4F_BE_IAR">
988 <description>Cortex-M4 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
989 <require Dcore="Cortex-M4" Dfpu="FPU" Dendian="Big-endian"/>
990 <require Tcompiler="IAR"/>
991 </condition>
992
993 <condition id="CM7_LE_IAR">
994 <description>Cortex-M7 processor based device in little endian mode for the IAR Compiler</description>
995 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Little-endian"/>
996 <require Tcompiler="IAR"/>
997 </condition>
998
999 <condition id="CM7_BE_IAR">
1000 <description>Cortex-M7 processor based device in big endian mode for the IAR Compiler</description>
1001 <require Dcore="Cortex-M7" Dfpu="NO_FPU" Dendian="Big-endian"/>
1002 <require Tcompiler="IAR"/>
1003 </condition>
1004
1005 <condition id="CM7F_LE_IAR">
1006 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1007 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
1008 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
1009 <require Tcompiler="IAR"/>
1010 </condition>
1011
1012 <condition id="CM7F_BE_IAR">
1013 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1014 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
1015 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
1016 <require Tcompiler="IAR"/>
1017 </condition>
1018
1019 <condition id="CM7FSP_LE_IAR">
1020 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1021 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Little-endian"/>
1022 <require Tcompiler="IAR"/>
1023 </condition>
1024
1025 <condition id="CM7FSP_BE_IAR">
1026 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1027 <accept Dcore="Cortex-M7" Dfpu="SP_FPU" Dendian="Big-endian"/>
1028 <require Tcompiler="IAR"/>
1029 </condition>
1030
1031 <condition id="CM7FDP_LE_IAR">
1032 <description>Cortex-M7 processor based device using Floating Point Unit in little endian mode for the IAR Compiler</description>
1033 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Little-endian"/>
1034 <require Tcompiler="IAR"/>
1035 </condition>
1036
1037 <condition id="CM7FDP_BE_IAR">
1038 <description>Cortex-M7 processor based device using Floating Point Unit in big endian mode for the IAR Compiler</description>
1039 <accept Dcore="Cortex-M7" Dfpu="DP_FPU" Dendian="Big-endian"/>
1040 <require Tcompiler="IAR"/>
1041 </condition>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1042
1043 <condition id="RTX Dependency">
1044 <description>Components required for RTX</description>
1045 <require condition="Cortex-M Device"/>
1046 <require Cclass="Device" Cgroup="Startup"/>
1047 <deny Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5"/>
1048 </condition>
1049
1050 <condition id="RTX5 Dependency">
1051 <description>Components required for RTX5</description>
1052 <require condition="Cortex-M Device"/>
1053 <require Cclass="CMSIS" Cgroup="CORE"/>
1054 <require Cclass="Device" Cgroup="Startup"/>
1055 <deny Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX"/>
1056 </condition>
1057
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1058 </conditions>
1059
1060 <components>
1061 <!-- CMSIS-Core component -->
1062 <component Cclass="CMSIS" Cgroup="CORE" Cversion="5.0.0" condition="Cortex-M ARMv8-M Device" >
1063 <description>CMSIS-CORE for Cortex-M, SC000, SC300, ARMv8-M</description>
1064 <files>
1065 <!-- CPU independent -->
1066 <file category="doc" name="CMSIS/Documentation/Core/html/index.html"/>
1067 <file category="include" name="CMSIS/Include/"/>
1068 </files>
1069 </component>
1070
1071 <!-- CMSIS-Startup components -->
1072 <!-- Cortex-M0 -->
1073 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS">
1074 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1075 <files>
1076 <!-- include folder / device header file -->
1077 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1078 <!-- startup / system file -->
1079 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s" version="1.0.0" attr="config" condition="ARMCC"/>
1080 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S" version="1.0.0" attr="config" condition="GCC"/>
1081 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1082 <file category="sourceAsm" name="Device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s" version="1.0.0" attr="config" condition="IAR"/>
1083 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1084 </files>
1085 </component>
1086 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0 CMSIS GCC">
1087 <description>System and Startup for Generic ARM Cortex-M0 device</description>
1088 <files>
1089 <!-- include folder / device header file -->
1090 <file category="header" name="Device/ARM/ARMCM0/Include/ARMCM0.h"/>
1091 <!-- startup / system file -->
1092 <file category="sourceC" name="Device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.c" version="1.0.0" attr="config" condition="GCC"/>
1093 <file category="linkerScript" name="Device/ARM/ARMCM0/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1094 <file category="sourceC" name="Device/ARM/ARMCM0/Source/system_ARMCM0.c" version="1.0.0" attr="config"/>
1095 </files>
1096 </component>
1097
1098 <!-- Cortex-M0+ -->
1099 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS">
1100 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1101 <files>
1102 <!-- include folder / device header file -->
1103 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1104 <!-- startup / system file -->
1105 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="ARMCC"/>
1106 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S" version="1.0.0" attr="config" condition="GCC"/>
1107 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1108 <file category="sourceAsm" name="Device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s" version="1.0.0" attr="config" condition="IAR"/>
1109 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1110 </files>
1111 </component>
1112 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM0+ CMSIS GCC">
1113 <description>System and Startup for Generic ARM Cortex-M0+ device</description>
1114 <files>
1115 <!-- include folder / device header file -->
1116 <file category="header" name="Device/ARM/ARMCM0plus/Include/ARMCM0plus.h"/>
1117 <!-- startup / system file -->
1118 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.c" version="1.0.0" attr="config" condition="GCC"/>
1119 <file category="linkerScript" name="Device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1120 <file category="sourceC" name="Device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c" version="1.0.0" attr="config"/>
1121 </files>
1122 </component>
1123
1124 <!-- Cortex-M3 -->
1125 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS">
1126 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1127 <files>
1128 <!-- include folder / device header file -->
1129 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1130 <!-- startup / system file -->
1131 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s" version="1.0.0" attr="config" condition="ARMCC"/>
1132 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S" version="1.0.0" attr="config" condition="GCC"/>
1133 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1134 <file category="sourceAsm" name="Device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s" version="1.0.0" attr="config" condition="IAR"/>
1135 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1136 </files>
1137 </component>
1138 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM3 CMSIS GCC">
1139 <description>System and Startup for Generic ARM Cortex-M3 device</description>
1140 <files>
1141 <!-- include folder / device header file -->
1142 <file category="header" name="Device/ARM/ARMCM3/Include/ARMCM3.h"/>
1143 <!-- startup / system file -->
1144 <file category="sourceC" name="Device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.c" version="1.0.0" attr="config" condition="GCC"/>
1145 <file category="linkerScript" name="Device/ARM/ARMCM3/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1146 <file category="sourceC" name="Device/ARM/ARMCM3/Source/system_ARMCM3.c" version="1.0.0" attr="config"/>
1147 </files>
1148 </component>
1149
1150 <!-- Cortex-M4 -->
1151 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS">
1152 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1153 <files>
1154 <!-- include folder / device header file -->
1155 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1156 <!-- startup / system file -->
1157 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s" version="1.0.0" attr="config" condition="ARMCC"/>
1158 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S" version="1.0.0" attr="config" condition="GCC"/>
1159 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1160 <file category="sourceAsm" name="Device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s" version="1.0.0" attr="config" condition="IAR"/>
1161 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1162 </files>
1163 </component>
1164 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM4 CMSIS GCC">
1165 <description>System and Startup for Generic ARM Cortex-M4 device</description>
1166 <files>
1167 <!-- include folder / device header file -->
1168 <file category="include" name="Device/ARM/ARMCM4/Include/"/>
1169 <!-- startup / system file -->
1170 <file category="sourceC" name="Device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.c" version="1.0.0" attr="config" condition="GCC"/>
1171 <file category="linkerScript" name="Device/ARM/ARMCM4/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1172 <file category="sourceC" name="Device/ARM/ARMCM4/Source/system_ARMCM4.c" version="1.0.0" attr="config"/>
1173 </files>
1174 </component>
1175
1176 <!-- Cortex-M7 -->
1177 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS">
1178 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1179 <files>
1180 <!-- include folder / device header file -->
1181 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1182 <!-- startup / system file -->
1183 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s" version="1.0.0" attr="config" condition="ARMCC"/>
1184 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S" version="1.0.0" attr="config" condition="GCC"/>
1185 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1186 <file category="sourceAsm" name="Device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s" version="1.0.0" attr="config" condition="IAR"/>
1187 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1188 </files>
1189 </component>
1190 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMCM7 CMSIS GCC">
1191 <description>System and Startup for Generic ARM Cortex-M7 device</description>
1192 <files>
1193 <!-- include folder / device header file -->
1194 <file category="include" name="Device/ARM/ARMCM7/Include/"/>
1195 <!-- startup / system file -->
1196 <file category="sourceC" name="Device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.c" version="1.0.0" attr="config" condition="GCC"/>
1197 <file category="linkerScript" name="Device/ARM/ARMCM7/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1198 <file category="sourceC" name="Device/ARM/ARMCM7/Source/system_ARMCM7.c" version="1.0.0" attr="config"/>
1199 </files>
1200 </component>
1201
1202 <!-- Cortex-SC000 -->
1203 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS">
1204 <description>System and Startup for Generic ARM SC000 device</description>
1205 <files>
1206 <!-- include folder / device header file -->
1207 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1208 <!-- startup / system file -->
1209 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s" version="1.0.0" attr="config" condition="ARMCC"/>
1210 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S" version="1.0.0" attr="config" condition="GCC"/>
1211 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1212 <file category="sourceAsm" name="Device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s" version="1.0.0" attr="config" condition="IAR"/>
1213 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1214 </files>
1215 </component>
1216 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC000 CMSIS GCC">
1217 <description>System and Startup for Generic ARM SC000 device</description>
1218 <files>
1219 <!-- include folder / device header file -->
1220 <file category="header" name="Device/ARM/ARMSC000/Include/ARMSC000.h"/>
1221 <!-- startup / system file -->
1222 <file category="sourceC" name="Device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.c" version="1.0.0" attr="config" condition="GCC"/>
1223 <file category="linkerScript" name="Device/ARM/ARMSC000/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1224 <file category="sourceC" name="Device/ARM/ARMSC000/Source/system_ARMSC000.c" version="1.0.0" attr="config"/>
1225 </files>
1226 </component>
1227
1228 <!-- Cortex-SC300 -->
1229 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS">
1230 <description>System and Startup for Generic ARM SC300 device</description>
1231 <files>
1232 <!-- include folder / device header file -->
1233 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1234 <!-- startup / system file -->
1235 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s" version="1.0.0" attr="config" condition="ARMCC"/>
1236 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S" version="1.0.0" attr="config" condition="GCC"/>
1237 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1238 <file category="sourceAsm" name="Device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s" version="1.0.0" attr="config" condition="IAR"/>
1239 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1240 </files>
1241 </component>
1242 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.1" condition="ARMSC300 CMSIS GCC">
1243 <description>System and Startup for Generic ARM SC300 device</description>
1244 <files>
1245 <!-- include folder / device header file -->
1246 <file category="header" name="Device/ARM/ARMSC300/Include/ARMSC300.h"/>
1247 <!-- startup / system file -->
1248 <file category="sourceC" name="Device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.c" version="1.0.0" attr="config" condition="GCC"/>
1249 <file category="linkerScript" name="Device/ARM/ARMSC300/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1250 <file category="sourceC" name="Device/ARM/ARMSC300/Source/system_ARMSC300.c" version="1.0.0" attr="config"/>
1251 </files>
1252 </component>
1253
1254 <!-- ARMv8MBL -->
1255 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS">
1256 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1257 <files>
1258 <!-- include folder / device header file -->
1259 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1260 <!-- startup / system file -->
1261 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.s" version="1.0.0" attr="config" condition="ARMCC"/>
1262 <file category="sourceAsm" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S" version="1.0.0" attr="config" condition="GCC"/>
1263 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1264 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1265 <!-- SAU configuration -->
1266 <file category="header" name="Device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h" version="1.0.0" attr="config"/>
1267 </files>
1268 </component>
1269 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MBL CMSIS GCC">
1270 <description>System and Startup for Generic ARM ARMv8MBL device</description>
1271 <files>
1272 <!-- include folder / device header file -->
1273 <file category="include" name="Device/ARM/ARMv8MBL/Include/"/>
1274 <!-- startup / system file -->
1275 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.c" version="1.0.0" attr="config" condition="GCC"/>
1276 <file category="linkerScript" name="Device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1277 <file category="sourceC" name="Device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c" version="1.0.0" attr="config"/>
1278 </files>
1279 </component>
1280
1281 <!-- ARMv8MML -->
1282 <component Cclass="Device" Cgroup="Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS">
1283 <description>System and Startup for Generic ARM ARMv8MML device</description>
1284 <files>
1285 <!-- include folder / device header file -->
1286 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1287 <!-- startup / system file -->
1288 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.s" version="1.0.0" attr="config" condition="ARMCC"/>
1289 <file category="sourceAsm" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S" version="1.0.0" attr="config" condition="GCC"/>
1290 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1291 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config" condition="ARMCC GCC"/>
1292 <!-- SAU configuration -->
1293 <file category="header" name="Device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h" version="1.0.0" attr="config"/>
1294 </files>
1295 </component>
1296 <component Cclass="Device" Cgroup="Startup" Cvariant="C Startup" Cversion="1.0.0" condition="ARMv8MML CMSIS GCC">
1297 <description>System and Startup for Generic ARM ARMv8MML device</description>
1298 <files>
1299 <!-- include folder / device header file -->
1300 <file category="include" name="Device/ARM/ARMv8MML/Include/"/>
1301 <!-- startup / system file -->
1302 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.c" version="1.0.0" attr="config" condition="GCC"/>
1303 <file category="linkerScript" name="Device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld" version="1.0.0" attr="config" condition="GCC"/>
1304 <file category="sourceC" name="Device/ARM/ARMv8MML/Source/system_ARMv8MML.c" version="1.0.0" attr="config"/>
1305 </files>
1306 </component>
1307
1308
1309 <!-- CMSIS-DSP component -->
1310 <component Cclass="CMSIS" Cgroup="DSP" Cversion="1.4.6" condition="CMSIS DSP">
1311 <description>CMSIS-DSP Library for Cortex-M, SC000, and SC300</description>
1312 <files>
1313 <!-- CPU independent -->
1314 <file category="doc" name="CMSIS/Documentation/DSP/html/index.html"/>
1315 <!-- <file category="header" name="CMSIS/Include/arm_common_tables.h"/> -->
1316 <file category="header" name="CMSIS/Include/arm_math.h"/>
1317 <!-- CPU and Compiler dependent -->
1318 <!-- ARMCC -->
1319 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1320 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM0b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1321 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1322 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM3b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1323 <file category="library" condition="CM4_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1324 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1325 <file category="library" condition="CM4F_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4lf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1326 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM4bf_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1327 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7l_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1328 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7b_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1329 <file category="library" condition="CM7FSP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1330 <file category="library" condition="CM7FSP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfsp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1331 <file category="library" condition="CM7FDP_LE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7lfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1332 <file category="library" condition="CM7FDP_BE_ARMCC" name="CMSIS/Lib/ARM/arm_cortexM7bfdp_math.lib" src="CMSIS/DSP_Lib/Source/ARM"/>
1333 <!-- GCC -->
1334 <file category="library" condition="CM0_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM0l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1335 <file category="library" condition="CM3_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM3l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1336 <file category="library" condition="CM4_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1337 <file category="library" condition="CM4F_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1338 <file category="library" condition="CM7_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7l_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1339 <file category="library" condition="CM7FSP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1340 <file category="library" condition="CM7FDP_LE_GCC" name="CMSIS/Lib/GCC/libarm_cortexM7lfdp_math.a" src="CMSIS/DSP_Lib/Source/GCC"/>
1341 </files>
1342 </component>
1343
1344 <!-- CMSIS-RTOS Keil RTX component -->
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1345 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX" Cversion="4.81.0" Capiversion="1.0" condition="RTX Dependency">
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1346 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
1347 <RTE_Components_h>
1348 <!-- the following content goes into file 'RTE_Components.h' -->
1349 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
1350 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
1351 </RTE_Components_h>
1352 <files>
1353 <!-- CPU independent -->
1354 <file category="doc" name="CMSIS/Documentation/RTOS/html/_r_t_x_implementation.html"/>
1355 <file category="header" name="CMSIS/RTOS/RTX/INC/cmsis_os.h"/>
1356 <file category="source" attr="config" name="CMSIS/RTOS/RTX/Templates/RTX_Conf_CM.c" version="4.70.1"/>
1357
1358 <!-- RTX templates -->
1359 <file category="header" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/osObjects.h" select="CMSIS-RTOS 'main' function"/>
1360 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/main.c" select="CMSIS-RTOS 'main' function"/>
1361 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MailQueue.c" select="CMSIS-RTOS Mail Queue"/>
1362 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MemPool.c" select="CMSIS-RTOS Memory Pool"/>
1363 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/MsgQueue.c" select="CMSIS-RTOS Message Queue"/>
1364 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Mutex.c" select="CMSIS-RTOS Mutex"/>
1365 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Semaphore.c" select="CMSIS-RTOS Semaphore"/>
1366 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Thread.c" select="CMSIS-RTOS Thread"/>
1367 <file category="source" attr="template" name="CMSIS/RTOS/RTX/UserCodeTemplates/Timer.c" select="CMSIS-RTOS Timer"/>
1368 <!-- tool-chain specific template file -->
1369 <file category="source" attr="template" condition="ARMCC" name="CMSIS/RTOS/RTX/SRC/ARM/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1370 <file category="source" attr="template" condition="GCC" name="CMSIS/RTOS/RTX/SRC/GCC/SVC_Table.S" select="CMSIS-RTOS User SVC"/>
1371 <file category="source" attr="template" condition="IAR" name="CMSIS/RTOS/RTX/SRC/IAR/SVC_Table.s" select="CMSIS-RTOS User SVC"/>
1372
1373 <!-- CPU and Compiler dependent -->
1374 <!-- ARMCC -->
1375 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1376 <file category="library" condition="CM0_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM0_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1377 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1378 <file category="library" condition="CM3_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1379 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1380 <file category="library" condition="CM4_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1381 <file category="library" condition="CM4_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1382 <file category="library" condition="CM4F_LE_ARMCC_STD" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1383 <file category="library" condition="CM4F_LE_ARMCC_IFX" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_IFX.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1384 <file category="library" condition="CM4F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1385 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1386 <file category="library" condition="CM7_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM3_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1387 <file category="library" condition="CM7F_LE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1388 <file category="library" condition="CM7F_BE_ARMCC" name="CMSIS/RTOS/RTX/LIB/ARM/RTX_CM4_B.lib" src="CMSIS/RTOS/RTX/SRC/ARM"/>
1389 <!-- GCC -->
1390 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1391 <file category="library" condition="CM0_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1392 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1393 <file category="library" condition="CM3_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1394 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1395 <file category="library" condition="CM4_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1396 <file category="library" condition="CM4_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1397 <file category="library" condition="CM4F_LE_GCC_STD" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1398 <file category="library" condition="CM4F_LE_GCC_IFX" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_IFX.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1399 <file category="library" condition="CM4F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1400 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1401 <file category="library" condition="CM7_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1402 <file category="library" condition="CM7F_LE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1403 <file category="library" condition="CM7F_BE_GCC" name="CMSIS/RTOS/RTX/LIB/GCC/libRTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/GCC"/>
1404 <!-- IAR -->
1405 <file category="library" condition="CM0_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1406 <file category="library" condition="CM0_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM0_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1407 <file category="library" condition="CM3_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1408 <file category="library" condition="CM3_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1409 <file category="library" condition="CM4_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1410 <file category="library" condition="CM4_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1411 <file category="library" condition="CM4F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1412 <file category="library" condition="CM4F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1413 <file category="library" condition="CM7_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1414 <file category="library" condition="CM7_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM3_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1415 <file category="library" condition="CM7F_LE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1416 <file category="library" condition="CM7F_BE_IAR" name="CMSIS/RTOS/RTX/LIB/IAR/RTX_CM4_B.a" src="CMSIS/RTOS/RTX/SRC/IAR"/>
1417 </files>
1418 </component>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1419
1420 <!-- CMSIS-RTOS Keil RTX5 component -->
1421 <component Cclass="CMSIS" Cgroup="RTOS" Csub="Keil RTX5" Cversion="5.0.0-Alpha" Capiversion="2.0" condition="RTX5 Dependency">
1422 <description>CMSIS-RTOS RTX implementation for Cortex-M, SC000, and SC300</description>
1423 <RTE_Components_h>
1424 <!-- the following content goes into file 'RTE_Components.h' -->
1425 #define RTE_CMSIS_RTOS /* CMSIS-RTOS */
1426 #define RTE_CMSIS_RTOS_RTX /* CMSIS-RTOS Keil RTX */
1427 </RTE_Components_h>
1428 <files>
1429 <!-- RTX documentation -->
1430 <!-- <file category="doc" name="CMSIS/Documentation/RTOS2/html/_r_t_x_implementation.html"/> -->
1431
1432 <!-- RTX header files -->
Robert Rostohareefdc5a2016-07-05 07:25:38 +0200[diff] [blame^]1433 <file category="header" name="CMSIS/RTOS2/Include/cmsis_os2.h"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1434 <file category="header" name="CMSIS/RTOS2/RTX/Include/rtx_os.h"/>
Robert Rostohareefdc5a2016-07-05 07:25:38 +0200[diff] [blame^]1435 <file category="header" name="CMSIS/RTOS2/RTX/Include1/cmsis_os.h"/>
Robert Rostohar4868c882016-07-01 23:10:03 +0200[diff] [blame]1436
1437 <!-- RTX configuration -->
1438 <file category="source" attr="config" name="CMSIS/RTOS2/RTX/Config/RTX_Config.c" version="5.0.0"/>
1439
1440 <!-- RTX templates -->
1441 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Template/main.c" select="CMSIS-RTOS 'main' function"/>
1442 <file category="source" attr="template" name="CMSIS/RTOS2/RTX/Source/user_svc.c" select="CMSIS-RTOS User SVC"/>
1443
1444 <!-- RTX compatibility module for API V1 -->
1445 <file category="source" name="CMSIS/RTOS2/RTX/Library/cmsis_os1.c"/>
1446
1447 <!-- RTX libraries (CPU and Compiler dependent) -->
1448 <!-- ARMCC -->
1449 <file category="library" condition="CM0_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM0.lib" src="CMSIS/RTOS2/RTX/Source"/>
1450 <file category="library" condition="CM3_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1451 <file category="library" condition="CM4_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1452 <file category="library" condition="CM4F_LE_ARMCC_STD" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
1453 <file category="library" condition="CM7_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM3.lib" src="CMSIS/RTOS2/RTX/Source"/>
1454 <file category="library" condition="CM7F_LE_ARMCC" name="CMSIS/RTOS2/RTX/Library/ARM/RTX_CM4F.lib" src="CMSIS/RTOS2/RTX/Source"/>
1455 <!-- GCC -->
1456 <file category="library" condition="CM0_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM0.a" src="CMSIS/RTOS2/RTX/Source"/>
1457 <file category="library" condition="CM3_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1458 <file category="library" condition="CM4_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1459 <file category="library" condition="CM4F_LE_GCC_STD" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
1460 <file category="library" condition="CM7_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM3.a" src="CMSIS/RTOS2/RTX/Source"/>
1461 <file category="library" condition="CM7F_LE_GCC" name="CMSIS/RTOS2/RTX/Library/GCC/libRTX_CM4F.a" src="CMSIS/RTOS2/RTX/Source"/>
1462 </files>
1463 </component>
Martin Günther89be6522016-05-13 07:57:31 +0200[diff] [blame]1464 </components>
1465
1466 <boards>
1467 <board name="uVision Simulator" vendor="Keil">
1468 <description>uVision Simulator</description>
1469 <mountedDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0"/>
1470 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM0P"/>
1471 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM3"/>
1472 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM4_FP"/>
1473 <compatibleDevice deviceIndex="0" Dvendor="ARM:82" Dname="ARMCM7_DP"/>
1474 </board>
1475 </boards>
1476
1477 <examples>
1478 <example name="DSP_Lib Class Marks example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_class_marks_example">
1479 <description>DSP_Lib Class Marks example</description>
1480 <board name="uVision Simulator" vendor="Keil"/>
1481 <project>
1482 <environment name="uv" load="arm_class_marks_example.uvprojx"/>
1483 </project>
1484 <attributes>
1485 <component Cclass="CMSIS" Cgroup="CORE"/>
1486 <component Cclass="CMSIS" Cgroup="DSP"/>
1487 <component Cclass="Device" Cgroup="Startup"/>
1488 <category>Getting Started</category>
1489 </attributes>
1490 </example>
1491
1492 <example name="DSP_Lib Convolution example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_convolution_example">
1493 <description>DSP_Lib Convolution example</description>
1494 <board name="uVision Simulator" vendor="Keil"/>
1495 <project>
1496 <environment name="uv" load="arm_convolution_example.uvprojx"/>
1497 </project>
1498 <attributes>
1499 <component Cclass="CMSIS" Cgroup="CORE"/>
1500 <component Cclass="CMSIS" Cgroup="DSP"/>
1501 <component Cclass="Device" Cgroup="Startup"/>
1502 <category>Getting Started</category>
1503 </attributes>
1504 </example>
1505
1506 <example name="DSP_Lib Dotproduct example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_dotproduct_example">
1507 <description>DSP_Lib Dotproduct example</description>
1508 <board name="uVision Simulator" vendor="Keil"/>
1509 <project>
1510 <environment name="uv" load="arm_dotproduct_example.uvprojx"/>
1511 </project>
1512 <attributes>
1513 <component Cclass="CMSIS" Cgroup="CORE"/>
1514 <component Cclass="CMSIS" Cgroup="DSP"/>
1515 <component Cclass="Device" Cgroup="Startup"/>
1516 <category>Getting Started</category>
1517 </attributes>
1518 </example>
1519
1520 <example name="DSP_Lib FFT Bin example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fft_bin_example">
1521 <description>DSP_Lib FFT Bin example</description>
1522 <board name="uVision Simulator" vendor="Keil"/>
1523 <project>
1524 <environment name="uv" load="arm_fft_bin_example.uvprojx"/>
1525 </project>
1526 <attributes>
1527 <component Cclass="CMSIS" Cgroup="CORE"/>
1528 <component Cclass="CMSIS" Cgroup="DSP"/>
1529 <component Cclass="Device" Cgroup="Startup"/>
1530 <category>Getting Started</category>
1531 </attributes>
1532 </example>
1533
1534 <example name="DSP_Lib FIR example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_fir_example">
1535 <description>DSP_Lib FIR example</description>
1536 <board name="uVision Simulator" vendor="Keil"/>
1537 <project>
1538 <environment name="uv" load="arm_fir_example.uvprojx"/>
1539 </project>
1540 <attributes>
1541 <component Cclass="CMSIS" Cgroup="CORE"/>
1542 <component Cclass="CMSIS" Cgroup="DSP"/>
1543 <component Cclass="Device" Cgroup="Startup"/>
1544 <category>Getting Started</category>
1545 </attributes>
1546 </example>
1547
1548 <example name="DSP_Lib Graphic Equalizer example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_graphic_equalizer_example">
1549 <description>DSP_Lib Graphic Equalizer example</description>
1550 <board name="uVision Simulator" vendor="Keil"/>
1551 <project>
1552 <environment name="uv" load="arm_graphic_equalizer_example.uvprojx"/>
1553 </project>
1554 <attributes>
1555 <component Cclass="CMSIS" Cgroup="CORE"/>
1556 <component Cclass="CMSIS" Cgroup="DSP"/>
1557 <component Cclass="Device" Cgroup="Startup"/>
1558 <category>Getting Started</category>
1559 </attributes>
1560 </example>
1561
1562 <example name="DSP_Lib Linear Interpolation example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_linear_interp_example">
1563 <description>DSP_Lib Linear Interpolation example</description>
1564 <board name="uVision Simulator" vendor="Keil"/>
1565 <project>
1566 <environment name="uv" load="arm_linear_interp_example.uvprojx"/>
1567 </project>
1568 <attributes>
1569 <component Cclass="CMSIS" Cgroup="CORE"/>
1570 <component Cclass="CMSIS" Cgroup="DSP"/>
1571 <component Cclass="Device" Cgroup="Startup"/>
1572 <category>Getting Started</category>
1573 </attributes>
1574 </example>
1575
1576 <example name="DSP_Lib Matrix example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_matrix_example">
1577 <description>DSP_Lib Matrix example</description>
1578 <board name="uVision Simulator" vendor="Keil"/>
1579 <project>
1580 <environment name="uv" load="arm_matrix_example.uvprojx"/>
1581 </project>
1582 <attributes>
1583 <component Cclass="CMSIS" Cgroup="CORE"/>
1584 <component Cclass="CMSIS" Cgroup="DSP"/>
1585 <component Cclass="Device" Cgroup="Startup"/>
1586 <category>Getting Started</category>
1587 </attributes>
1588 </example>
1589
1590 <example name="DSP_Lib Signal Convergence example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_signal_converge_example">
1591 <description>DSP_Lib Signal Convergence example</description>
1592 <board name="uVision Simulator" vendor="Keil"/>
1593 <project>
1594 <environment name="uv" load="arm_signal_converge_example.uvprojx"/>
1595 </project>
1596 <attributes>
1597 <component Cclass="CMSIS" Cgroup="CORE"/>
1598 <component Cclass="CMSIS" Cgroup="DSP"/>
1599 <component Cclass="Device" Cgroup="Startup"/>
1600 <category>Getting Started</category>
1601 </attributes>
1602 </example>
1603
1604 <example name="DSP_Lib Sinus/Cosinus example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_sin_cos_example">
1605 <description>DSP_Lib Sinus/Cosinus example</description>
1606 <board name="uVision Simulator" vendor="Keil"/>
1607 <project>
1608 <environment name="uv" load="arm_sin_cos_example.uvprojx"/>
1609 </project>
1610 <attributes>
1611 <component Cclass="CMSIS" Cgroup="CORE"/>
1612 <component Cclass="CMSIS" Cgroup="DSP"/>
1613 <component Cclass="Device" Cgroup="Startup"/>
1614 <category>Getting Started</category>
1615 </attributes>
1616 </example>
1617
1618 <example name="DSP_Lib Variance example" doc="Abstract.txt" folder="CMSIS/DSP_Lib/Examples/ARM/arm_variance_example">
1619 <description>DSP_Lib Variance example</description>
1620 <board name="uVision Simulator" vendor="Keil"/>
1621 <project>
1622 <environment name="uv" load="arm_variance_example.uvprojx"/>
1623 </project>
1624 <attributes>
1625 <component Cclass="CMSIS" Cgroup="CORE"/>
1626 <component Cclass="CMSIS" Cgroup="DSP"/>
1627 <component Cclass="Device" Cgroup="Startup"/>
1628 <category>Getting Started</category>
1629 </attributes>
1630 </example>
1631 </examples>
1632
1633</package>