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Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +00001#ifndef PLATFORM_H
2#define PLATFORM_H
3
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +00004#include <inttypes.h>
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +00005#include <stdio.h>
6
7#include "cy_pdl.h"
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +00008#include "cy_retarget_io.h"
Roman Okhrimenkodc0ca082023-06-21 20:49:51 +03009#include "cybsp.h"
10#include "cycfg.h"
11#include "cyhal.h"
12#include "cyhal_wdt.h"
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +000013
14#if defined(CY_BOOT_USE_EXTERNAL_FLASH) || defined(CYW20829)
15#include "flash_qspi.h"
16#endif /* defined(CY_BOOT_USE_EXTERNAL_FLASH) || defined(CYW20829) */
17
18#ifdef BOOT_IMAGE
Roman Okhrimenkodc0ca082023-06-21 20:49:51 +030019#define IMAGE_TYPE "BOOT"
20#define BLINK_PERIOD (1000u)
21#define GREETING_MESSAGE_INFO "[BlinkyApp] Red led blinks with 1 sec period\r\n"
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +000022#elif defined(UPGRADE_IMAGE)
Roman Okhrimenkodc0ca082023-06-21 20:49:51 +030023#define IMAGE_TYPE "UPGRADE"
24#define BLINK_PERIOD (250u)
25#define GREETING_MESSAGE_INFO "[BlinkyApp] Red led blinks with 0.25 sec period\r\n"
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +000026#else
Roman Okhrimenkodc0ca082023-06-21 20:49:51 +030027#error "[BlinkyApp] Please specify type of image: -DBOOT_IMAGE or -DUPGRADE_IMAGE\r\n"
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +000028#endif /* BOOT_IMAGE */
29
Roman Okhrimenkodc0ca082023-06-21 20:49:51 +030030#define GREETING_MESSAGE_VER "[BlinkyApp] Version:"
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +000031
Roman Okhrimenkodc0ca082023-06-21 20:49:51 +030032#define WATCHDOG_FREE_MESSAGE "[BlinkyApp] Turn off watchdog timer\r\n"
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +000033
34#define SMIF_ID (1U) /* Assume SlaveSelect_0 is used for External Memory */
35
Roman Okhrimenkodc0ca082023-06-21 20:49:51 +030036static const char* core33_message = "CM33";
37static const char* core0p_message = "CM0P";
38static const char* core4_message = "CM4";
39static const char* core7_message = "CM7";
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +000040
41#if defined(__cplusplus)
42extern "C" {
43#endif /* defined(__cplusplus) */
44
45static inline const char* test_app_init_hardware(void)
46{
47 const char* detect_core_message = NULL;
Roman Okhrimenkodc0ca082023-06-21 20:49:51 +030048 (void)core33_message;
49 (void)core0p_message;
50 (void)core4_message;
51 (void)core7_message;
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +000052 cy_rslt_t res = CY_RSLT_TYPE_ERROR;
53
54 const cy_stc_gpio_pin_config_t LED_config = {
55 .outVal = 1,
56 .driveMode = CY_GPIO_DM_STRONG_IN_OFF,
57 .hsiom = HSIOM_SEL_GPIO,
58 .intEdge = CY_GPIO_INTR_DISABLE,
59 .intMask = 0UL,
60 .vtrip = CY_GPIO_VTRIP_CMOS,
61 .slewRate = CY_GPIO_SLEW_FAST,
62 .driveSel = CY_GPIO_DRIVE_FULL,
63 .vregEn = 0UL,
64 .ibufMode = 0UL,
65 .vtripSel = 0UL,
66 .vrefSel = 0UL,
67 .vohSel = 0UL,
68 };
69
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +000070 cybsp_init();
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +000071 /* enable interrupts */
72 __enable_irq();
73
74 /* Initialize led port */
75 Cy_GPIO_Pin_Init(LED_PORT, LED_PIN, &LED_config);
76
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +000077 res = cy_retarget_io_init(CY_DEBUG_UART_TX, CY_DEBUG_UART_RX, CY_RETARGET_IO_BAUDRATE);
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +000078
79 if (res != CY_RSLT_SUCCESS) {
80 CY_ASSERT(0);
81 /* Loop forever... */
82 for (;;) {
83 }
84 }
85
86 printf("\n===========================\r\n");
87 printf("%s %s\r\n", GREETING_MESSAGE_VER, IMG_VER_MSG);
88
89#ifdef CYW20829
90 detect_core_message = core33_message;
91
92 printf("===========================\r\n");
93
94 cy_en_smif_status_t rc = CY_SMIF_CMD_NOT_FOUND;
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +000095
96 rc = qspi_init_sfdp(SMIF_ID);
97 if (CY_SMIF_SUCCESS == rc) {
98 printf("[BlinkyApp] External Memory initialized w/ SFDP. \r\n");
99 } else {
100 printf("[BlinkyApp] External Memory initialization w/ SFDP FAILED: 0x%" PRIx32 " \r\n", (uint32_t)rc);
101 }
102
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +0000103#else
104 /* Determine on which core this app is running by polling CPUSS_IDENTITY register.
105 * This register contains bits field [8:11]. This field specifies the bus master
106 * identifier of the transfer that reads the register.
107 */
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +0000108
Roman Okhrimenkodc0ca082023-06-21 20:49:51 +0300109#ifdef APP_CM0P
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +0000110 en_prot_master_t core = _FLD2VAL(CPUSS_IDENTITY_MS, CPUSS->IDENTITY);
111
112 if (CPUSS_MS_ID_CM4 == core) {
113 printf("\n[BlinkyApp] is compiled for CM0P core, started on CM4 instead. Execution Halted.\n");
114 CY_ASSERT(0);
Roman Okhrimenkodc0ca082023-06-21 20:49:51 +0300115 } else if (CPUSS_MS_ID_CM0 == core) {
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +0000116 detect_core_message = core0p_message;
Roman Okhrimenkodc0ca082023-06-21 20:49:51 +0300117 } else
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +0000118#endif /* APP_CM0P */
119 {
120 detect_core_message = core4_message;
121 }
Roman Okhrimenkodc0ca082023-06-21 20:49:51 +0300122#ifdef APP_CM7
123 if (CPUSS_MS_ID_CM7_0 == _FLD2VAL(CPUSS_IDENTITY_MS, CPUSS->IDENTITY)) {
124 detect_core_message = core7_message;
125 }
126#endif
127
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +0000128 printf("===========================\r\n");
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +0000129#endif /* CYW20829 */
130 printf("[BlinkyApp] GPIO initialized \r\n");
131 printf("[BlinkyApp] UART initialized \r\n");
132 printf("[BlinkyApp] Retarget I/O set to 115200 baudrate \r\n");
Roman Okhrimenkodc0ca082023-06-21 20:49:51 +0300133 cyhal_wdt_kick(NULL);
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +0000134
Roman Okhrimenkodc0ca082023-06-21 20:49:51 +0300135 return (detect_core_message);
Dovhal Artem (CSUKR CSS ICW SW FW 1)f7a3d1b2022-04-01 15:07:37 +0000136}
137
138#if defined(__cplusplus)
139}
140#endif /* defined(__cplusplus) */
141
142#endif /* PLATFORM_H */