blob: ff4b42e559c547f0a4a6ee528c2012f30abdb7ab [file] [log] [blame]
Andrzej Puzdrowski9a605b62020-03-16 13:34:30 +01001/*
2 * Copyright (c) 2020 Nordic Semiconductor ASA
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
Piotr Mienkowskia5046692020-04-02 01:41:54 +02007#include <arch/arm/aarch32/cortex_m/cmsis.h>
Andrzej Puzdrowski9a605b62020-03-16 13:34:30 +01008
9void cleanup_arm_nvic(void) {
10 /* Allow any pending interrupts to be recognized */
11 __ISB();
12 __disable_irq();
13
14 /* Disable NVIC interrupts */
Kumar Gala0813efe2020-05-27 12:25:41 -050015 for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICER); i++) {
Andrzej Puzdrowski9a605b62020-03-16 13:34:30 +010016 NVIC->ICER[i] = 0xFFFFFFFF;
17 }
18 /* Clear pending NVIC interrupts */
Kumar Gala0813efe2020-05-27 12:25:41 -050019 for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICPR); i++) {
Andrzej Puzdrowski9a605b62020-03-16 13:34:30 +010020 NVIC->ICPR[i] = 0xFFFFFFFF;
21 }
22}
Ioannis Glaropoulos70af7082020-10-22 15:14:48 +020023
Andrzej Puzdrowskic74c5512020-10-29 13:59:35 +010024#if CONFIG_CPU_HAS_ARM_MPU
Ioannis Glaropoulos70af7082020-10-22 15:14:48 +020025__weak void z_arm_clear_arm_mpu_config(void)
26{
27 int i;
28
29 int num_regions =
30 ((MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos);
31
32 for (i = 0; i < num_regions; i++) {
33 ARM_MPU_ClrRegion(i);
34 }
35}
Andrzej Puzdrowskic74c5512020-10-29 13:59:35 +010036#endif